All Thought Leadership

Verification Horizons

DAC Panel: Bridging Pre-Silicon Verification and Post-Silicon Validation

I’d like to encourage you to attend the technical panel titled Bridging Pre-Silicon Verification and Post-Silicon Validation at this year’s ...

By Harry Foster

Verification Horizons

Accellera’s DAC Breakfast & Panel Discussion

UVM: Charting the New Territory At this year’s DAC, Accellera introduces UVM (Universal Verification Methodology) to the world at its...

By Dennis Brophy

Embedded Software

Static or static

In English, the word “static” has a variety of meanings, but they can be summed up by the definition of...

Verification Horizons

Easier UVM Testbench Construction – UVM Sequence Layering

UVM Layering Package updated from OVM Layering Package In an earlier blog post, I discussed a sequence layering technique that...

By Dennis Brophy

Embedded Software

A good day out

Last Saturday, we had an interesting day out. It all started because Libby’s mother was going to the US and...

Embedded Software

Hacking your car

In the early days of PCs, the software was very fragile – from a security point of view. Virus software...

Verification Horizons

North American SystemC User Group (NASCUG) Meeting at DAC

You Are Invited – Register Now! (seating is limited) Sunday, June 13 2:30pm – 6:00pm Anaheim Hilton, California Ballroom A...

By Dennis Brophy

Verification Horizons

An Extension to UVM: The UVM Container

Easier DUT to Testbench Connections This package introduces a very simple class called uvm_container. In this package Mentor shows how...

By Dennis Brophy

Embedded Software

What sign are you?

As I was born at the beginning of April, I am Aries – the sign of the Ram. This information...