Sometimes you just want less – Splitting IC layouts saves time and resources

By Dennis Joseph – Mentor, A Siemens Business

One slice instead of the whole pizza. One single 1¼“ nail, not a bucket of 600. One white undershirt, not a package of five. Sometimes you want just a small part of something that is traditionally delivered as a larger whole. Getting the full package means you’re simply wasting money and/or resources. That’s the idea behind splitting an IC layout…

Don’t need the full-chip layout? Save the part(s) you do need as a smaller, separate layout. Not only does it load faster and use less memory than the full-chip layout, but it’s also much easier to view and share just those specific parts of the layout needed for a given task.

The best part is…how much or how little to include in a layout is up to you. Using the Calibre® DESIGNrev™ layout viewer, you can define which parts of a layout to keep or remove to get the desired layout. This approach allows you to create as much context as you want around your region of interest.

If you’d like to learn more about the details of how you can do more with less, download a copy of our white paper, Splitting IC layouts for faster verification and debugging, and get started improving your debug efficiency!