By Dina Medhat Latch-up is modeled as a short circuit (low-impedance path) that occurs in an integrated circuit (IC). It…
The recent surge in used car prices may have you wondering what is driving this upswing, and just how much…
By Dina Medhat Electrostatic discharge (ESD) events cause severe damage to unprotected integrated circuits (ICs). You already know that, of…
By Neel Natekar As integrated circuits (ICs) grow in complexity, they create new challenges for IC verification flows and electronic…
By Sherif Hany and Abdellah Bakhali Regardless of which technology node they’re using, design houses that create high-voltage and multiple…
By Matthew Hogan How are you handling your reliability verification right now? Custom reliability verification? No reliability verification? How confident…
Got the mid-winter blahs? The post-New Year letdown? Looking for something to rev you up? How about an automated method…
By Dina Medhat – Mentor, A Siemens Business Design rule waivers Maybe a design rule that made sense at 22nm…
By Dina Medhat, Mentor Graphics Accurate verification of explicitly-defined analog design constraints is crucial for reliability and performance.