Design with Calibre

The industry-leading Calibre toolsuite provides physical verification (DRC), circuit verification (LVS, PEX), and reliability verification (PERC), as well as Calibre DFM optimization, to ensure IC designs will deliver the power, performance, and foundry yield today’s markets demand. Across all process nodes and design styles, innovative functionality ensures the Calibre toolsuite provides accurate, efficient, comprehensive IC verification while minimizing resources and tapeout schedules.

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Latest posts

Shining a light on silicon photonics verification

June 14, 2021

By John Ferguson, Omar ElSewefy, Nermeen Hossam, Basma Serry We’re all fascinated by light. Light beams shooting from aliens’ eyes,…

By Design With Calibre
2 MIN READ

ESD protection verification in 2.5/3D ICs is HARD (or is it?) Our on-demand webinar has the answer

June 7, 2021

By Calibre Staff Electrostatic discharge (ESD) is a big worry for integrated circuit (IC) designers, for good reason. A bit…

By Design With Calibre
2 MIN READ

SAFE is good. SAFE awards are even better…

June 1, 2021

By Calibre staff Safe is good, right? We all want to be safe, especially these days. But safe took on…

By Design With Calibre
2 MIN READ

Turn IC verification challenge from a hard slog into a walk in the park by using static checks

May 19, 2021

By Neel Natekar As integrated circuits (ICs) grow in complexity, they create new challenges for IC verification flows and electronic…

By Design With Calibre
2 MIN READ

A SAMPle of what you need to know about SAMP technology

May 13, 2021

By Calibre Design Staff Prior to the availability of extreme ultraviolet (EUV) lithography, multi-patterning provided the only workable yield solution…

By Design With Calibre
2 MIN READ

Realize Live + U2U: Side by Side

May 4, 2021

What a difference a year can make! Oh, we’re not referring to that virus that shifted the Earth on its…

By Design With Calibre
2 MIN READ

Give me my space! Why high voltage and multiple power domain designs need automated context-aware spacing checks

April 20, 2021

By Sherif Hany and Abdellah Bakhali Regardless of which technology node they’re using, design houses that create high-voltage and multiple…

By Design With Calibre
2 MIN READ

DFM: Still a really good thing to do!

April 14, 2021

By Simon Favre If you’re not using critical area analysis and design for manufacturing to improve your IC yield and…

By Design With Calibre
2 MIN READ

Calibre and the Semiconductor Ecosystem

April 12, 2021

The Semiconductor Ecosystem- It is the definition of “High Tech”, but it isn’t just about technology, there are two other…

By Design With Calibre
< 1 MIN READ