Design with Calibre

The industry-leading Calibre toolsuite provides physical verification (DRC), circuit verification (LVS, PEX), and reliability verification (PERC), as well as Calibre DFM optimization, to ensure IC designs will deliver the power, performance, and foundry yield today’s markets demand. Across all process nodes and design styles, innovative functionality ensures the Calibre toolsuite provides accurate, efficient, comprehensive IC verification while minimizing resources and tapeout schedules.

Latest posts

GLOBALFOUNDRIES and Mentor Launch a New Innovative DRC+ Hotspot Solution using Machine Learning in Calibre

December 9, 2020

By Shelly Stalnaker – Mentor, A Siemens Business I recently had the chance to attend an on-demand webinar introducing the…

By Design With Calibre

2 MIN READ

Mentor receives 2020 TSMC OIP Partner of the Year awards for EDA solutions

November 30, 2020

By Shelly Stalnaker – Mentor, A Siemens Business While the structure of the TSMC OIP Ecosystem Forum had to change…

By Design With Calibre

2 MIN READ

Verification run configurations stressing you out? Automate them!

November 12, 2020

By Srinivas Velivala – Mentor, A Siemens Business As all new IC verification engineers learn very quickly, there is far…

By Design With Calibre

2 MIN READ

SAFE at home! Attending the Samsung SAFE forum in 2020

October 22, 2020

By Shelly Stalnaker – Mentor, A Siemens Business Samsung is going virtual with their 2020 SAFE forum, and Mentor, a…

By Design With Calibre

2 MIN READ

Do you have a reliable automated waiver process for reliability verification?

October 13, 2020

By Dina Medhat – Mentor, A Siemens Business Design rule waivers Maybe a design rule that made sense at 22nm…

By Design With Calibre

2 MIN READ

SAMP series finishes with SAMP cut mask decomposition techniques

September 9, 2020

By David Abercrombie and Rehab Kotb Ali – Mentor, A Siemens Business We’ve been writing about self-aligned multi-patterning (SAMP) topics…

By Design With Calibre

2 MIN READ

Breaking it down…How interconnect segmentation helps resolve P2P resistance errors

August 12, 2020

By Slava Zhuchenya – Mentor, A Siemens Business Point-to-point (P2P) simulations find and report nets that exceed predefined resistance thresholds…

By Design With Calibre

2 MIN READ

VLSI optimization—a bridge too far?

August 12, 2020

source: Andrew Shiva/CC BY-SA 4.0By Sherif Hany – Mentor, A Siemens Business Job without end. How about job done? Have…

By Design With Calibre

2 MIN READ

A better, faster, smarter way to insert filler cells in P&R

August 11, 2020

By Fady Fouad, Jeff Wilson, Esraa Swillam – Mentor, A Siemens Business Filler cells—Those cells inserted by the P&R tool…

By Design With Calibre

2 MIN READ