Design with Calibre

The industry-leading Calibre toolsuite provides physical verification (DRC), circuit verification (LVS, PEX), and reliability verification (PERC), as well as Calibre DFM optimization, to ensure IC designs will deliver the power, performance, and foundry yield today’s markets demand. Across all process nodes and design styles, innovative functionality ensures the Calibre toolsuite provides accurate, efficient, comprehensive IC verification while minimizing resources and tapeout schedules.

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IC designers: find your focus and priorities during DRC debug

IC designers: find your focus and priorities during DRC debug

April 5, 2018

By Srinivas Velivala – Mentor, A Siemens Business Layout design verification gets exponentially harder with each new process technology node….

By Design With Calibre
3 MIN READ
Highlights from SPIE – Successes and advancements over the past year

Highlights from SPIE – Successes and advancements over the past year

March 8, 2018

By Gandharv Bhatara – Mentor, A Siemens Business At the 43rd SPIE Advanced Lithography conference in San Jose that ran from…

By Design With Calibre
6 MIN READ
Calibre PERC electrical reliability verification – why you need it at every node

Calibre PERC electrical reliability verification – why you need it at every node

March 5, 2018

By Juan C. Rey, Vice President of Engineering, Calibre – Mentor, A Siemens Business If you’re not performing electrical reliability…

By Design With Calibre
3 MIN READ
Watch & Learn: Reducing Time-to-Support

Watch & Learn: Reducing Time-to-Support

February 26, 2018

By Srinivas Velivala – Mentor, A Siemens Business If you’re a chip designer or a CAD person trying to figure…

By Design With Calibre
4 MIN READ
Simplify and speed up early floorplan verification with incremental interface DRC

Simplify and speed up early floorplan verification with incremental interface DRC

February 13, 2018

By James Paris – Mentor, A Siemens Business In early floorplan verification, incomplete blocks produce numerous interface errors. Incremental interface…

By Design With Calibre
3 MIN READ
Establishing a reliability baseline provides confidence and consistency

Establishing a reliability baseline provides confidence and consistency

February 6, 2018

By Matthew Hogan – Mentor, A Siemens Business Design companies must establish baseline robustness and reliability criteria throughout the entire…

By Design With Calibre
3 MIN READ
Get to yield ramp faster…even with new design styles

Get to yield ramp faster…even with new design styles

January 30, 2018

By Wael Manhawy and Joe Kwan – Mentor, A Siemens Business Having trouble ramping yield for new, unproven design styles? Experiments…

By Design With Calibre
3 MIN READ
HDAP connectivity verification—what’s your solution?

HDAP connectivity verification—what’s your solution?

January 23, 2018

By Tarek Ramadan – Mentor, A Siemens Business New HDAP designs like FO-WLP require package-level connectivity verification tools and processes….

By Design With Calibre
3 MIN READ
What’s New in Multi-Patterning?

What’s New in Multi-Patterning?

January 17, 2018

If you work with multi-patterning technology, you know it is a constantly-evolving process. From the addition of new multi-patterning techniques…

By Design With Calibre
2 MIN READ