Design with Calibre

The industry-leading Calibre toolsuite provides physical verification (DRC), circuit verification (LVS, PEX), and reliability verification (PERC), as well as Calibre DFM optimization, to ensure IC designs will deliver the power, performance, and foundry yield today’s markets demand. Across all process nodes and design styles, innovative functionality ensures the Calibre toolsuite provides accurate, efficient, comprehensive IC verification while minimizing resources and tapeout schedules.

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Autonomous Systems and IC Reliability

Autonomous Systems and IC Reliability

June 2, 2015

By Matthew Hogan, Mentor Graphics New standards for IC quality and reliability verification

By Design With Calibre
6 MIN READ
Balancing on the Color Density Tightrope

Balancing on the Color Density Tightrope

May 26, 2015

By David Abercrombie Potential pitfalls and available solutions.

By Design With Calibre
9 MIN READ
Rule Deck Comparison Doesn’t Have to be Difficult

Rule Deck Comparison Doesn’t Have to be Difficult

May 19, 2015

By Saunder Peng Comparing results from different rule decks can be frustrating. Learn how you can use a chip finishing…

By Design With Calibre
5 MIN READ
Capacity Constraints and DFM at Mature Nodes

Capacity Constraints and DFM at Mature Nodes

May 12, 2015

By Jeff Wilson, Mentor Graphics Design for manufacturing – it’s a variety of practices that can improve yield and prevent…

By Design With Calibre
10 MIN READ
How to Use Pattern Matching to Improve Automatic Waiver Management

How to Use Pattern Matching to Improve Automatic Waiver Management

May 5, 2015

By John Ferguson and Jonathan Muirhead, Mentor Graphics Ensuring a known level of quality

By Design With Calibre
6 MIN READ
Migrating Consumer Electronics to the Automotive Market with Calibre PERC

Migrating Consumer Electronics to the Automotive Market with Calibre PERC

April 28, 2015

By Matthew Hogan, Mentor Graphics Calibre PERC can help you succeed in the automotive market

By Design With Calibre
6 MIN READ
Cutting Fab Costs and Turnaround Time with Smart, Automated Resource Management

Cutting Fab Costs and Turnaround Time with Smart, Automated Resource Management

April 21, 2015

By Mark Simmons, Mentor Graphics Simple in theory, challenging in reality

By Design With Calibre
4 MIN READ
Free Is a Good Price, Especially for Process Design Kits

Free Is a Good Price, Especially for Process Design Kits

April 14, 2015

By Joseph Davis, Mentor Graphics The freePDK15 and its associated 15 nm Open Cell Library are now available!

By Design With Calibre
4 MIN READ
Accurate Lithography Simulation for Silicon Photonics

Accurate Lithography Simulation for Silicon Photonics

April 7, 2015

By Joe Kwan, Mentor Graphics Precise curved geometries are vital to making silicon photonics technology work

By Design With Calibre
5 MIN READ