By David Abercrombie and Alex Pearson, Mentor Graphics Applying ECOs to multiĀpatterned designs can be a nightmare, unless you plan…
By David Abercrombie, Mentor Graphics How do you know which double patterning flow to use?
By Matthew Hogan, Mentor Graphics The increasing use of SoC designs turns efficient IC design and validation into a team…
By Valeriy Sukharev, Jun-Ho Choy, Armen Kteyan and Henrik Hovsepyan, Mentor Graphics Optimizing power usage for mobile devices at advanced…
By Karen Chow, Mentor Graphics Signal integrity analysis at advanced nodes requires new and enhanced parasitic extraction techniques
By Michael White, Mentor Graphics Will fan-out wafer-level packaging be the impetus that pushes 3D-IC into mainstream acceptance?
By Dina Medhat, Mentor Graphics Automated voltage propagation with Calibre PERC makes it easier to comply with voltage-aware DRC spacing…
By David Abercrombie, Mentor Graphics Triple and quadruple patterning can baffle even the most experienced designers. David Abercrombie has some…
By Dina Medhat, Mentor Graphics Gradual damage from electromigration can affect product performance and reduce product lifetimes. Reliability analysis ensures…