Streamlining semiconductor verification with the Calibre Interactive interface

By Slava Zhuchenya In the world of semiconductors, creating and verifying IC designs is no cakewalk. It’s a complex dance…

Transistor-level EMIR analysis from custom design tools? It’s all about flexibility!

By Roger Kang How do you run transistor-level electromigration and voltage drop (EMIR) analysis—command line or an interactive invocation GUI?…

Optimize metal fill insertion while protecting critical nets and devices…automatically!

By Dina Medhat Context-aware physical verification (PV) is a relatively new addition to traditional PV flows, but it has quickly…

Introducing Calibre DesignEnhancer design-stage layout optimization!

By Jeff Wilson Introduced in early 2023, the Calibre DesignEnhancer tool is part of a growing suite of shift-left tools…

What’s all the fuss about shift left?

By Michael White and David Abercrombie In recent months, it seems as though everyone’s been talking about shift left as…

Why take chances with your PV job setups when a winning alternative is available?

By Richard Yan Are you interested in optimizing your integrated circuit (IC) physical verification (PV) flows? How does automating the…

How can I run reliability checks early in the design cycle?

By Hossam Sarhan and Alexandre Arriordaz With the increasing complexity of design layouts and shorter tapeout cycles, waiting until signoff…

A software migration that improves productivity? The Calibre Interactive tool has a (new) GUI for that…

By Slava Zhuchenya Software migration can be a dreaded endeavor, especially for electronic design automation (EDA) tools that design companies…

Fast, efficient, productive? Your early-stage IC design physical verification can be all that…

By John Ferguson and Nermeen Hossam With each new process node comes more complex requirements needed to ensure working silicon. …