{"id":1682,"date":"2018-10-02T12:08:54","date_gmt":"2018-10-02T19:08:54","guid":{"rendered":"https:\/\/blogs.mentor.com\/calibre\/?p=1682"},"modified":"2025-12-17T11:34:52","modified_gmt":"2025-12-17T16:34:52","slug":"fixing-drc-errors-in-sadp-designs-at-sign-off-nobody-said-it-was-easy-but-it-can-be-easierand-much-faster","status":"publish","type":"post","link":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/2018\/10\/02\/fixing-drc-errors-in-sadp-designs-at-sign-off-nobody-said-it-was-easy-but-it-can-be-easierand-much-faster\/","title":{"rendered":"Fixing DRC errors in SADP designs at sign-off\u2014Nobody said it was easy (but it can be easier\u2026and much faster)"},"content":{"rendered":"<p>By David Abercrombie &#8211; Mentor, A Siemens Business<\/p>\n<p><em>SADP + DRC = headaches? Not any longer.\u00a0 GLOBALFOUNDRIES and Mentor collaborated on a solution for auto-fixing those DRC violations quickly and accurately.<\/em><\/p>\n<p><!--more--><\/p>\n<p>Okay, you\u2019ve reached sign-off on your SADP design. You did your level best to create a decomposed layout that met every SADP requirement. You run your sign-off DRC and\u2026you\u2019ve got errors! Now what? It\u2019s going to take HOURS, if not DAYS, to debug and fix those errors. You\u2019re either going to have to manually make changes in multiple decomposition layers (UGH), or make changes to the target metal shapes and re-run the automated design decomposition (with no guarantees that the changes will fix all the errors). Isn\u2019t there a better way?<\/p>\n<p>Well, yes. At least, now there is. GLOBALFOUNDRIES and Mentor recognized the frustration their mutual customers were experiencing, and put their (expert) heads together to figure out a better solution. The result? The Calibre Multi-Patterning functionality can now automatically decompose a layout (or modify an existing decomposition) using built-in DRC awareness and error visualization.<\/p>\n<p><a href=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/50\/2018\/10\/Fig10_decompose-n-auto-fix.jpg\" target=\"_blank\" rel=\"noopener\"><img loading=\"lazy\" decoding=\"async\" class=\"alignnone wp-image-1683 size-large\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/50\/2018\/10\/Fig10_decompose-n-auto-fix-1024x287.jpg\" alt=\"\" width=\"1024\" height=\"287\" \/><\/a><\/p>\n<p>The key to auto-fixing DRC errors in an SADP layout is enabling the tool to make minor tweaks to the decomposition that only slightly change the metal shapes formed on the wafer, as compared to the originally-drawn target metal shapes. None of these changes affect the LVS connectivity of the design, or move any via connections to the metal, so there is no functional or resistance change in the circuit.<\/p>\n<p>Oh, and did I mention that the tool also generates an updated target metal layer for back-annotation into the design database?<\/p>\n<p>How, exactly, does all this work? You can get the full details in our white paper <a href=\"https:\/\/www.mentor.com\/products\/ic_nanometer_design\/resources\/overview\/sadp-design-finishing-saving-time-and-improving-results-with-drc-auto-fixing-27f92318-478d-4443-b4f7-2ef55de73b11\/?cmpid=11722\" target=\"_blank\" rel=\"noopener noreferrer\">SADP design finishing \u2013 Saving time and improving results with DRC auto-fixing<\/a><\/p>\n<p><a href=\"http:\/\/linkd.in\/1fZ4vYq\" target=\"_blank\" rel=\"noopener noreferrer\"><img loading=\"lazy\" decoding=\"async\" class=\"alignnone size-full wp-image-637\" src=\"https:\/\/blogs.sw.siemens.com\/wp-content\/uploads\/sites\/50\/2015\/09\/LinkedIn-Button.jpg\" alt=\"\" width=\"300\" height=\"70\" \/><\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>By David Abercrombie &#8211; Mentor, A Siemens Business SADP + DRC = headaches? Not any longer.\u00a0 GLOBALFOUNDRIES and Mentor collaborated&#8230;<\/p>\n","protected":false},"author":71645,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spanish_translation":"","french_translation":"","german_translation":"","italian_translation":"","polish_translation":"","japanese_translation":"","chinese_translation":"","footnotes":""},"categories":[1],"tags":[],"industry":[],"product":[],"coauthors":[712],"class_list":["post-1682","post","type-post","status-publish","format-standard","hentry","category-news"],"_links":{"self":[{"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/posts\/1682","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/users\/71645"}],"replies":[{"embeddable":true,"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/comments?post=1682"}],"version-history":[{"count":1,"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/posts\/1682\/revisions"}],"predecessor-version":[{"id":3063,"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/posts\/1682\/revisions\/3063"}],"wp:attachment":[{"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/media?parent=1682"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/categories?post=1682"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/tags?post=1682"},{"taxonomy":"industry","embeddable":true,"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/industry?post=1682"},{"taxonomy":"product","embeddable":true,"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/product?post=1682"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/blogs.stage.sw.siemens.com\/calibre\/wp-json\/wp\/v2\/coauthors?post=1682"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}