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Exploring production-proven AI-powered EDA solutions with Solido Design Environment

Note: If you’re interested in knowing more about Solido Design Environment, check out this executive video by Amit Gupta, VP…

Bridging the gap between semiconductor IP providers and integrators

Note: To learn more about Solido Crosscheck’s QA exchange deck, check out the whitepaper https://resources.sw.siemens.com/en-US/white-paper-the-qa-exchange-deck-in-solido-crosscheck-enables-an-ip-qualification. This whitepaper discusses how the…

‘SPICE up’ your Verification this holiday season!

Just as I wrapped up my fancy Thanksgiving cooking marathon, I couldn’t help but draw parallels between the meticulous artistry…

IP QA best practices

A few months ago, it was reported that Apple was beginning the development of their A19 Bionic SoC using a…

Do you hear me now?

Siemens Symphony platform accelerates mixed-signal verification of DSP chips

Next-generation RF, ESD and IO designs on display at TSMC 2023 OIP Ecosystem Forum

TSMC 2023 Open Innovation Platform® Ecosystem Forum is taking a world stage in North America, Europe, Taiwan, China, Israel and…

How AI-powered EDA solutions help design and verify library IP for SoCs

Note: If you’re interested in knowing more about the Solido Library IP Solution, check out our on-demand webinar about optimizing…

Discussing Custom IC Verification with Taiwan Semiconductor Community

Taiwan is an inspiration to many countries that aspire to build or expand their semiconductor ecosystem. Although a small nation,…

Mixed Reality needs Mixed Signal

Mixed Reality needs Mixed Signal

Empowering the Design and Verification of Mixed-Signal SoCs for Advanced Spatial Computing with Symphony Pro We are on the cusp…