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NEPES partners with Siemens to streamline its advanced wafer-level IC Packaging wafer map mask creation process

Siemens’ Xpedition Package Designer automates a manual error prone process saving days of effort and reducing risk

Seoul, South Korea., August 17, 2021 ― NEPES, an industry leading provider of semiconductor packaging and test services, announces that it has partnered with Siemens Digital Industries Software to develop and deliver an automated and streamlined process for wafer level packaging mask creation, checking, documenting and wafer map array generation that replaces the previous and industry common process of using simple documentation and 2D drafting tools along with manual human intervention.

“NEPES is a leader in the semiconductor packaging industry with its wafer and panel level fabrication and assembly processes. By partnering with Siemens we are able to develop an automated and retarget able process that significantly reduces the path and risk from initial Customer Wafer Information (CWI) to fabrication-ready wafer mask creation,” said Jay Kim, Senior VP, CTO of NEPES Corp. “With the Siemens’ High-Density Advanced Package (HDAP) tools our customers are now able to go from CWI to wafer mask ready in a short and highly reliable path.”

“We are pleased to have collaborated with industry pioneer NEPES by leveraging our Xpedition HDAP platform to help automate and streamline their existing processes,” said AJ Incorvaia, senior vice president of the EBS division of Siemens Digital Industries Software. “By providing a fully scalable CWI to wafer map array generation flow, NEPES’ customers can now more quickly and efficiently move their designs into high volume manufacturing.”

About NEPES, Corp.

Founded in 1990, NEPES is a packaging solution provider in system IC. Started with chemical business, acquired US patent for solder bumping technology for semiconductors in 2004. NEPES commercialized for the first time in Korea, Plating bumping, WLP (Wafer level packaging), FOWLP (Fan-out Wafer level packaging) and PLP (Panel level packaging) technology. Providing FOWLP service to global No.1

Click here to read press release.

Note: A list of relevant Siemens trademarks can be found here.

John McMillan

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.stage.sw.siemens.com/electronic-systems-design/2021/08/23/nepes-partners-with-siemens-to-streamline-its-advanced-wafer-level-ic-packaging-wafer-map-mask-creation-process/