Today I will outline our third pillar of PCB design best practices, digital prototype-driven verification. When it comes to digital…
Many designers go to great lengths to make sure they do appropriate length-matching, even to the level of including the…
Yeah, that’s what I said. Vias are longer than their length. Phrased more appropriately, the delay introduced by a via has…
Too often I see people just using straight length to manage their board timing. Or take it one step further…
In the digital design world, we have typically only seen S-parameters used to model packages. They are a popular output…
You may have heard lately about IBIS-AMI models, which are being used more often for SERDES simulation. IBIS-AMI stands for I/O…
Anyone who has ever had to simulate a SERDES interface knows how long it take to run a couple hundred…
To begin this series on fundamentals of signal integrity, lets start at the very beginning. Before you start doing any…
Over the last few days, I’ve been in some interesting discussions, the crux of which revolved around “why would anybody…
