It’s never too late to fix a design problem. Well, maybe if the product is shipping, that might be classified…
Whether you are trying to correlate simulated waveforms to measured waveforms for a DDR3 signal, or board timing numbers for…
Simulations should match measurements. Otherwise, what good are they? When doing signal integrity simulations, that starts with comprehensive stackup modeling. …
Many designers go to great lengths to make sure they do appropriate length-matching, even to the level of including the…
Yeah, that’s what I said. Vias are longer than their length. Phrased more appropriately, the delay introduced by a via has…
Too often I see people just using straight length to manage their board timing. Or take it one step further…
In the digital design world, we have typically only seen S-parameters used to model packages. They are a popular output…
You may have heard lately about IBIS-AMI models, which are being used more often for SERDES simulation. IBIS-AMI stands for I/O…
Anyone who has ever had to simulate a SERDES interface knows how long it take to run a couple hundred…
