Mentor at ArmTechCon 2019
Mentor, a Siemens Business is a Platinum Sponsor for this year’s Arm TechCon. We support the broad range of Arm®-based architectures to develop today’s advanced digital technologies. Arm TechCon provides a comprehensive education tailored for developers, engineers, architects, product designers, and executives that features the latest advances in technology around Arm’s world class technology and renowned ecosystem.
ArmTechCon 2019 is going to be held from Oct 8-10, at San Jose Convention Center. In both the conference agenda and in Booth #737, our experts will showcase key technologies that support Arm-based architectures across Catapult & PowerPro, Tanner EDA, Questa Advanced Verification, the Veloce Emulation Platform, and Mentor Embedded Software Solutions.
CONFERENCE PROGRAM SCHEDULE
- Tuesday:
Tuesday October 08, 11:30am – 12:20pm | TBD
Speaker: Jeff Hancock, Senior Product Manager, Mentor, a Siemens Business
In this session, you will learn more about the concept of mixed-criticality and ways to keep the safe-world safe from the non-safe-world on a single embedded device. With the move to consolidation and the growth on connectivity to the cloud, how can a system obtain the new functionality all while maintaining the safety needs?
Tuesday October 08, 02:30pm -03:20pm | TBD
Speaker: Colin Walls, Embedded Software Technologist, Mentor, a Siemens Business
This session will provide an understanding of the important role that software now has in the minimizing of device power consumption and why low power must be considered at all stages of the development process. In this paper, the speaker will discuss design considerations that should be made when starting a new power sensitive embedded design, which include choosing the hardware with desired capabilities, defining a hardware architecture that will allow software to dynamically control power consumption, defining appropriate power usage profiles, making the appropriate choice of an operating system and drivers, choosing measurable power goals and providing these goals to the software development team to track throughout the development process.
- Wednesday:
Wednesday October 09, 04:30pm – 05:00pm | Arm TechCon Hall Theater
Speaker: Ann Keffer – Product Marketing Manager, Mentor ICVS Division
Mentor Safe IC provides a comprehensive functional safety solution bringing increased automation for the entire safety flow, increasing efficiency, shortening development cycles and reducing risk.
2. Early AXI4 SoC Performance Verification with SystemC, NVIDIA MatchLib & HLS
Wednesday October 09, 3:30 -5:30pm | Grand Ballroom 210B
Speaker: Stuart Swan, HLS IP/Platform Architect, CSD Calypto – Marketing, Mentor, a Siemens Business
MatchLib, originally developed by NVIDIA Research, is a new open source library that enables much faster design and verification of SoCs using High-Level Synthesis (HLS). One of the primary objectives of MatchLib is to enable performance accurate modeling of SoCs in SystemC/C++. With these models, designers can identify and resolve issues such as bus and memory contention, arbitration strategies, and optimal AXI4 interconnect structure at a much higher level of abstraction than RTL. Once the architectural performance is verified, it provides a fully automated flow to silicon using Catapult HLS. This presentation will introduce MatchLib and its usage with Catapult HLS using some AXI4 SoC demonstration examples.
Wednesday October 09, 3:30 – 5:30pm | Grand Ballroom 220C
Speaker: Muhammad Shafique, Senior Product Manager, Mentor, a Siemens Business
This workshop presents an integrated approach that can help organizations overcome this challenge while still realizing a cohesive, compelling solution. Specifically, the workshop presents a low code mobile and web application development platform from Mendix that integrates with embedded operating systems from Mentor in a seamless fashion. Some of the learning objectives include and Introduction to a Low Code mobile and web application development platform, Hands-On lab where a low code web application is developed and integrated with an embedded application to create a complete IoT Solution.
- Thursday:
Thursday October 10, 4:30pm – 5:20pm | Grand Ballroom 210B
Speaker: Jeff Miller, Product Marketing and Strategy Manager, IC Design Solutions
The design of connected sensor devices, whether for automotive, industrial automation, or the IoT, incorporate a wide range of design disciplines including MEMS, analog IC, digital IC, photonics and embedded software. This presentation will take you through the design of a connected sensor device, including the simulation and design of the MEMS ultrasonic transducer, an analog driver circuit, and its integration into the overall mixed signal system using an Arm Cortex-M microprocessor and embedded software.
2. A More Efficient Approach to ASIL B Compliance of a Microprocessor
Thursday October 10, 02:30pm – 03:20pm | TBD
Speaker: Ann Keffer, Product Marketing Manager, Mentor ICVS Division
Bottom-up safety analysis is important in reducing the number of iterations throughout the workflow. In addition to validating expert-driven judgment, it provides critical guidance during design enhancement and fault verification. This session presents a new process for automating the three pillars of the random fault workflow: safety analysis, safety insertion, and safety verification.
Thursday, Oct 10, 11:30am | Grand Ballroom 210B
Speaker: Kathy Tufto, Senior Product Manager, Mentor, a Siemens Business
If you are considering converting your existing application from a real-time operating system (RTOS) to Linux this presentation will help you through the decision-making process and the transition, by providing practical information on the benefits of moving to OSS, highlighting some of the key impacts and considerations for such a move, and highlighting some Linux options available for the Arm Cortex-A processor series.
Thursday, October 10, 01:30 -02:20pm | Grand Ballroom 210B
Speakers: Joe Hupcey, Verification Product Technologist, Mentor, a Siemens Business
Wesley Park, Questa Formal R&D, Mentor, a Siemens Business
Today’s designs rely heavily on a growing variety of complex interface protocols whose implementations must be verified to ensure IP interoperability and proper system behavior. In this paper, the speakers will show how exhaustive formal verification of RTL protocol implementations using libraries of properties in IEEE standard SVA can exhaustively prove that customizations and extensions of the standard protocol implementation don’t violate the core of the protocol, or create unexpected corner cases. Examples will be in the context of the popular AMBA protocol.
Thursday, October 10, 02:30pm – 03:20pm |Grand Ballroom 210B
Speaker: David Fritz, Global Technology Manager, Autonomous and ADAS, Mentor, a Siemens Business
This presentation describes an innovative approach based on new methodology that combines verification and modeling of sensors, electronics and mechatronics components. Sensing, Computing and Actuating components need to be included in any comprehensive verification process of autonomous vehicles. This presents a significant challenge, since it isn’t practical to do physical prototyping and use trial-and-error approach to find issues.
| Theater Presentation Schedule: Wednesday, October 9th | |
| Time | Presentation Title |
| 11:30 AM | Sneak Peek of “Early AXI4 SoC Performance Verification Using SystemC, NVIDIA MatchLib, and HLS” |
| 12:00 PM | Video: Mentor EDA Solutions |
| 1:00 PM | Are You Prepared for 5G Platform Deployment? |
| 1:30 PM | Chip Design/Verification Economics across Clouds and Platforms |
| 2:00 PM | Overview of TLS 1.3 |
| 2:30 PM | Sensor Design for the IoT |
| 3:00 PM | A Metrics-Driven Power Regression Methodology for RTL IP |
| 3:30 PM | Are You Prepared for 5G Platform Deployment? |
| 4:00 PM | Plan Driven and Requirements Driven Verification |
| 4:30 PM | Embedded multicore: enablement of heterogeneous OSes and mixed criticality systems |
| 5:00 PM | Sensor Design for the IoT |
| 5:30 PM | Announce Daily Prize Winners! |
| Theater Presentation Schedule: Thursday, October 10th | |
| Time | Presentation Title |
| 11:30 AM | Sensor Design for the IoT |
| 12:00 PM | Video: Mentor EDA Solutions |
| 1:00 PM | Is a Debian Linux-based enterprise-class embedded OS the right solution for your company? |
| 1:30 PM | HLS 101 – What Every HW Design Team Needs to Know |
| 2:00 PM | Veloce Strato Platform: Ready for Deployment in 5G, Storage and ADAS Markets |
| 2:30 PM | SoC Software Enablement |
| 3:00 PM | Sensor Design for the IoT |
| 3:30 PM | Deliver IoT Fast |
| 4:00 PM | Mentor Safe IC – End-to-end Functional Safety Flow |
| 4:30 PM | Veloce Strato Platform: Ready for Deployment in 5G, Storage and ADAS Markets |
| 5:00 PM | Fastest Time to SoC/ASIC Power for Real-World Scenarios Using Emulation |
| 5:30 PM | Announce Daily Prize Winners! |
- EXHIBIT FLOOR
Mentor’s main booth will be #737, located in the middle of the exhibit floor. Check in daily for a host of conference and theatre sessions, networking events, panel discussions, giveaways, and complementary espresso drinks.
Theater presentations will occur in the booth every half-hour staring at 11:30am on both Wednesday and Thursday. Attendees will also have the chance to enter to win some great prizes!
- Technical Sessions in the Mentor Booth
Each day, Mentor experts will be in the booth delivering technical sessions and talks across:
- HLS & RTL Low-Power solutions
- Embedded Platform Solutions
- Analog/Mixed-Signal Verification
- Advanced Verification & Emulation Platform
- Functional Verification
- Autonomous and ADAS technology
You can view the complete list of technical sessions and pre-register here.
