Thought Leadership

Join Mentor at TSMC OIP 2019

This week is very exciting for us as Mentor will be participating in TSMC OIP Ecosystem Forum on September 26, 2019.

In this era of 5G, artificial intelligence, and autonomous vehicles, semiconductor chips are not only crunching numbers but are tightly interacting with the physical world around us. We live in an analog world that cannot be accurately represented with purely digital design. Despite massive advancement in scaling digital logic to 7/5nm, not all designs at the leading edge are digital. In fact, there are mixed-signal components in designs at almost all nodes down to 7/5nm.

Since last year’s event, we have made several advancements in the Analog Mixed-Signal Verification space and are delighted to share them with the design and verification community. Stop-by Mentor booth and learn about –

Analog FastSPICE (AFS), the world’s fastest nanometer circuit verification platform for analog, RF, mixed-signal, and custom digital circuits.

Symphony, the industry’s Fastest and Most Versatile Mixed-Signal Platform

Solido Variation Designer, world’s best technology for variation-aware design of memory, analog/RF, and standard cells

Solido ML Characterization Suite, fast, production-accurate library characterization tools powered by machine learning

Not only this, at TSMC OIP, you can attend the following informative session by Mentor and our partners:

  • Calibre in the Cloud – A Case study with AMD, Mentor & TSMC – by Microsoft/AMD/Mentor
  • Overcome time-to-market and resource challenges: Hierarchical DFT for advanced node SoC design and production – by AMD/Mentor
  • Comprehensive ESD/Latch-up reliability verification for IP & SoC Designs – by NXP/Silicon Frontline/Mentor
  • Optimize SOC designs while enabling faster tapeouts by closing chip integration DRC issues early in the design cycle – by MaxLinear/Mentor
  • Large Scale Silicon Photonic Interconnects for Mass Market Adoption – by HPE/Mentor

Last but not least, check out the TSMC OIP Forum Book which showcases our AMS publication “Silicon Accurate Analog Mixed Signal Verification of Mixel’s Dual Mode C-PHY/D-PHY IP for AR/VR Display ICs with Mentor AFSand is available to all customer attendees.

Mentor’s AMS Solutions are certified by TSMC down to 5nm FinFET, and our latest press release with TSMC shows our strong commitment to the ongoing partnership to support next-generation process technologies.

There’s a lot more going on at Mentor, so be sure to stop by our booth, meet Mentor Product managers and learn what is new and how we can help solve your design and verification problems.

Sumit Vishwakarma

Sumit Vishwakarma has over 15 years of experience in the EDA industry including 10 years in AMS and 5 years in digital verification. At Mentor, Sumit is responsible for product management and marketing functions across Mentor’s AMS verification product portfolio driving circuit simulation, mixed-signal, and library characterization platform. Over the years, Sumit has held various roles ranging from design engineer, application engineer and verification specialist at Intel, Springsoft and Synopsys. Before joining Mentor, Sumit was responsible to drive the sales and development of Analog/Mixed-Signal simulators and verification and debug platforms at Synopsys. He has published papers in IEEE, DesingCon, DAC, SNUG, U2U, and multiple tech articles and blogs on mixed-signal verification methodologies. Sumit has an MS in Electrical engineering from Arizona State and Management Science & Engineering PD from Stanford. He is a vivid digital artist and loves teaching art to kids.

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.stage.sw.siemens.com/expertinsights/2019/09/20/join-mentor-at-tsmc-oip-2019/