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The Rise of Custom Acceleration

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A trend sweeping through chip design is changing the traditional markets for CPUs and GPUs. Along the way, it is accelerating the number of design starts for artificial intelligence (AI) and building chips known as custom accelerators.

The custom accelerator trend is driven by system companies becoming semiconductor companies not relying on other companies to build their chips. They do most of the chip design in house to control the ecosystem, roadmaps, and time to market, adopting a different perspective. A good example is Apple. It’s designing its own iPhone and Mac chips now and they are not the end product. Their end product is a system that includes peripherals and software.

In today’s landscape, both semiconductor and system companies are racing to make announcements about their own custom accelerators in a vibrant and growing market segment. A custom accelerator is an ASIC, or a chip dedicated to a specific function. It is not a generic CPU or GPU. Nor is it an application serving a broad market. Instead, it is a well-defined, custom-designed accelerator for a specific AI or machine learning (ML) function.

A company uses AI and ML to design its chips and they are not designed by hardware engineers. Because everything starts with a software driver, software defines the product. This new type of user is not taking the derivative of a whole design for targeted chips to address a specific market or application. In this design flow, hardware design is started only after the system specification is defined.

The number of companies making AI or ML chips are generating requirements for loads of verification of big systems because these chips are large and need to run massive workloads and SW. The growth is in many areas, not just one. Add hyperscalers as another category not relying on traditional semiconductor companies. All are making their own chips where the size of the workload they run are perfect fits for an emulation and prototyping platform.

While user profiles have evolved, so too have requirements for verification and verification. The combination of peripherals and the software is fueling the adoption of hardware-assisted verification (HAV), whether it’s hardware emulation or prototyping.

As an HAV vendor, knowing the challenges and responding is critical. Engineers need to consider chip complexity, speed/performance and size, as well as whether the system will consume less power. Yield is important because it directly impacts margins.

One single emulator or prototyping tool is not satisfactory for different steps along the design, verification, and validation flow. It must be the right tool for the right task. A hardware emulator is not enterprise prototyping. An emulator is used for fast turnaround delivering debug compile scalability. Prototyping is deployed when speed is required. Traditional software prototyping are necessary when speed and system software validation are a must. Three congruent hardware-assisted verification with emulation, enterprise prototyping and traditional software prototyping platforms are a must.

Vijay Chobisa has over 20 years of experience in hardware emulation. He is currently the Product Management Senior Director for Hardware-assisted Verification at Siemens. He has worked as a technical marketing engineer and technical marketing manager at IKOS systems and as an ASIC design engineer at Logic++. Vijay holds a bachelor’s degree of electronics and communication engineering from Jai Narayan Vyas University, Rajasthan, India. 

lisa.hartman@siemens.com

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.stage.sw.siemens.com/hardware-assisted-verification/2024/08/22/the-rise-of-custom-acceleration/