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Jean-Marie Brunet

Jean-Marie Brunet is the Vice President and General Manager of Hardware Assisted Verification at Siemens EDA. He has served for over 25 years in management roles in marketing, application engineering, product management and product engineering roles in the EDA industry, and has held IC design and design management positions at STMicroelectronics, Cadence, and Micron among others. Jean-Marie holds a master's degree in electrical engineering from I.S.E.N Electronic Engineering School in Lille, France.

Facing a New Age of IC Design Challenges Part 1

Facing a New Age of IC Design Challenges Part 1

July 25, 2024
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 3</span> <span class="rt-label rt-postfix">minutes</span></span>In an industry accustomed to incremental change, Veloce CS is a departure because it is a complete three-in-one system, a...
By Jean-Marie Brunet
< 1 MIN READ
The Strategic Advantage in the Hardware-Assisted Verification Segment

The Strategic Advantage in the Hardware-Assisted Verification Segment

July 12, 2024
<span class="span-reading-time rt-reading-time" style="display: block;"><span class="rt-label rt-prefix">Reading Time: </span> <span class="rt-time"> 3</span> <span class="rt-label rt-postfix">minutes</span></span>Welcome to the Siemen hardware-assisted verification group blog. Technologies in this group include software-based tools for architectural design and verification,...
By Jean-Marie Brunet
< 1 MIN READ