Image showing physical design IP reuse with Xpedition Package designer

Embracing physical design IP reuse as a best practice

Efficiency in IC package design is becoming more important as design cycles shorten and complexity surges. One common approach to…

Two people working at a white board with text onscreen that says: Multiplying engineering resources for efficient package substrate design

Multiplying engineering resources for efficient package substrate design

In the world of package substrate design, the age-old saying, “many hands make light work,” holds more truth than ever….

Image of a chip with text that says: High Bandwidth Memory integration

Managing the complexities of High Bandwidth Memory integration in high-performance computing

The utilization of High Bandwidth Memory (HBM) has become a cornerstone for high performance computing (HPC) CPUs, GPUs, and AI…

Image of a chip on a board with text that says Navigating complexities in power delivery analysis: embracing the shift-left approach

Navigating complexities in power delivery analysis: embracing the shift-left approach

The demand for increased power and performance in semiconductor packages has surged. As more die and chiplets are integrated into…

An image of an IC package design in Xpedition Package Designer with text that says: Achieving substrate supplier fabrication requirements: a designer's guide

Achieving substrate supplier fabrication requirements: a designer’s guide

Designing advanced package layouts with large areas of metal can be a daunting task, given the stringent requirements imposed by…

What's new in Xpedition IC Packaging

What’s new in Xpedition IC Packaging VX.2.14

The new VX.2.14 release of Xpedition IC Packaging includes improvements and enhancements to both Xpedition Substrate Integrator and Xpedition Package…

system technology co-optimization

Shifting left with system technology co-optimization for IC packaging

We have witnessed and learned about the industry’s significant shift in semiconductors. The traditional approach of transistor scaling, once universally…

Illustration of an IC Package design with text that says Why are you spending 30%+ more time on semiconductor packaging design?

Why are you spending 30%+ more time on semiconductor packaging design?

Designs are just getting bigger and more complex Yes, an obvious aspect is increasing design complexity. Packages are now a…

Illustration of 3D IC design workflows

Why co-design-driven semiconductor package planning and prototyping is critical for design success

The connectivity management complexity of package assemblies where multiple chiplets/ASICs and memory are heterogeneously integrated, introduces a great deal of…