Semiconductor Packaging

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Monolithic scaling limitations drive the growth of 2.5/3D multi-chiplet, heterogeneous integration that enables PPA targets to be met. Our integrated flow addresses prototyping challenges to signoff for FOWLP, 2.5/3D IC, and other emerging integration technologies.

Learn more about semiconductor packaging design and verification.

Featured posts

Image showing physical design IP reuse with Xpedition Package designer

Embracing physical design IP reuse as a best practice

July 22, 2024

Efficiency in IC package design is becoming more important as design cycles shorten and complexity surges. One common approach to…

By Keith Felton
2 MIN READ
New innovative way to functionally verify heterogeneous 2D/3D package connectivity

New innovative way to functionally verify heterogeneous 2D/3D package connectivity

June 6, 2024

This blog introduces a white paper that addresses the challenges of verifying
package connectivity and illustrated how to use formal tools to verify connectivity for package designs.

By John McMillan and Todd Burkholder
3 MIN READ
Two people working at a white board with text onscreen that says: Multiplying engineering resources for efficient package substrate design

Multiplying engineering resources for efficient package substrate design

May 14, 2024

In the world of package substrate design, the age-old saying, “many hands make light work,” holds more truth than ever….

By Keith Felton
2 MIN READ

Latest posts

3D IC and the system-technology co-optimization (STCO) approach

3D IC and the system-technology co-optimization (STCO) approach

August 3, 2022

Semiconductor engineers aim to deliver best-in-class devices despite technology scaling and cost limitations of monolithic integrated circuit (IC) design. To…

By anthonymastroianni
2 MIN READ

What’s the current state of 3D IC design?

July 20, 2022

In the first podcast about 3D IC heterogeneous integration, we talked about the disaggregation of once monolithic implementation architectures into…

By Heather George
9 MIN READ

Getting your metal fill right

July 14, 2022

If you’re involved in semiconductor package design using routable substrates — that is, as opposed to leadframe based — then…

By Keith Felton
2 MIN READ
The beginner’s guide to 3D IC

The beginner’s guide to 3D IC

July 7, 2022

As consumer electronic devices grow increasingly connected, intelligent and advanced, designers need new methodologies such as 3D IC to address…

By Heather George
17 MIN READ

Semiconductor package design market trends: 2023 forecast from Siemens EDA

June 29, 2022

Semiconductor package design industry in 2023 expects to see accelerated growth of heterogeneous integration resulting emergence and adoption of new technology.

By Keith Felton
3 MIN READ