Image of an IC package design with text that says A workflow methodology for homogeneous disaggregation using hierarchical device planning

A workflow methodology for homogeneous disaggregation using hierarchical device planning

Advancements in IC packaging manufacturing, combined with the exploding costs of designing monolithic ICs on today’s advanced process nodes, have…

Illustration of an IC Package design with text that says Why are you spending 30%+ more time on semiconductor packaging design?

Why are you spending 30%+ more time on semiconductor packaging design?

Designs are just getting bigger and more complex Yes, an obvious aspect is increasing design complexity. Packages are now a…

Illustration of 3D IC design workflows

Why co-design-driven semiconductor package planning and prototyping is critical for design success

The connectivity management complexity of package assemblies where multiple chiplets/ASICs and memory are heterogeneously integrated, introduces a great deal of…

2.5D and 3D IC design testing challenges

Shifting left for earlier testing in 2.5D and3D IC design

In our last 3D IC blog, we talked about the impact of 3D IC on device reliability. In today’s blog,…

Image of a semiconductor package design

What are the top challenges of high-performance computing/AI semiconductor package design?

If you’re designing a high-performance processor-based package,  it’s common for the semiconductor package design to contain multiple logic chips that…

Revolutionizing semiconductors with 3D IC and chiplet technology

Each Industrial Revolution resulted in advancements that propelled humans forward into a seemingly different world. The first in 1784 was…

Illustration that says next generation IC Packaging part 4

The five keys to next-generation IC packaging design: Part 4

“Golden signoff” – The final step in the semiconductor packaging process In my last blog post, I talked about the…

3D heterogeneous integration devices with multiple 3D IC components

The impact of 3d heterogeneous integration on semiconductor device reliability

So far in our 3D IC blog series, we’ve discussed front-end design approaches to develop 3D IC-based devices, the importance…

The five keys to next-generation IC packaging design: Part 3

Scalability and range of IC packaging design solutions In my last blog, I talked about multi-domain and cross-domain integration that…