Thought Leadership

Getting Organized with SystemVerilog Arrays

May 28, 2020 • < 1 MIN READ
By Chris Spear

SystemVerilog has many ways to store your data. Vectors, arrays, structures, classes, and probably several more ways that I don’t remember. There are too many choices to squeeze into even 10 blog posts, so I made a webinar, actually two of them, to help you get organized.

The first webinar focuses on vectors, fixed size arrays, dynamic arrays, queues, associative arrays, and strings. (Yeah, that’s one I forgot.) Here is a sneak peek – a diagram to help you choose between these different types.

Choose arrays

Ever stumble across the following code and wondered what it does?

q = array.find(x) with (x>5);

Looks like it is trying to find something greater than 5, but what is that ‘x’ for, and why does searching an array produce a queue? Sign up for the webinar with the full explanation. It is Friday June 5 at 8:15am PDT. I’m starting a little later so you can grab another cup of coffee before joining, or give your home-school kid some breakfast. No problem if you can’t make it as these are all recorded.

Enjoy your verification journey!
Chris Spear

Keep learning at mentor.com/training
Questions or ideas? verificationacademy.com/ask-chris-spear
View my recent webinar on UVM Coding Guidelines and the Questions and Answers

 

 

Chris Spear

Chris brings over forty years of EDA expertise to Siemens customers. Holding a degree in electrical engineering from Cornell University, Chris has developed deep roots in the EDA industry, including as a Principal Application Consultant. Chris is also an industry author, writing the 2012 best-selling “SystemVerilog for Verification” and developing the IEEE standard for random seeding and File I/O PLI package that is part of SystemVerilog. Having taught thousands of engineers around the world, Chris is driven by a passion for learning new techniques and then helping others learn best practices for hardware verification. Outside of work, you may see Chris bicycling over 12,000-foot mountain passes.

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This article first appeared on the Siemens Digital Industries Software blog at https://blogs.stage.sw.siemens.com/verificationhorizons/2020/05/28/getting-organized-with-systemverilog-arrays/