RISC-V

Do You Know for Sure Your RISC-V RTL Doesn’t Contain Any Surprises?

Given the relative novelty and complexity of RISC-V RTL designs, whether you are buying a commercially supported core or downloading…

DVCon USA 2022 How to Avoid the Pitfalls of Mixing Formal and Simulation Coverage

Preview of DVCon 2022 — How to Avoid the Pitfalls of Mixing Formal and Simulation Coverage

With eight papers in two separate sessions focused exclusively on formal verification, one could assert (pun intended) that this year’s…

The Many Flavors of Equivalence Checking: Part 6, FPGA-focused Equivalency Checking Flows

With last year’s acquisition of OneSpin, we now have a valuable addition to the solutions I described in The Many…

58th Design Automation Conference

Build Your Career by Attending the Static & Formal Verification University at DAC 2021

Among the reasons to go to university are the opportunities to open new career paths by learning new technical skills,…

How Can You Say That Formal Verification Is Exhaustive?

As a companion to my previous post on Learn Formal the Easy Way, allow me to explain what are often…

First day of school 2021 - 2022

Learn Formal the Easy Way

The sight of kids going back to school can prompt feelings of joy and renewal – or trigger less pleasant…

Formal Verification Experiences: Spiral Refinement Methodology for Silicon Bug Hunting

DVCon U.S. 2021 Best Paper Report – Formal Verification Experiences: Spiral Refinement Methodology for Silicon Bug Hunt

This year’s DVCon U.S. saw many great papers, posters, and tutorials; covering almost every aspect of functional verification. Thus, in…

U2U 2020 - Raytheon - CoverCheck

3 Notable Formal Verification Conference Papers of 2020

On the short list of positive things to come out of the past year are the formal verification-focused conference papers…

It’s obviously a good thing to include X-propagation analysis in your constrained-random simulation testbench flow.

Reducing Area and Power Consumption while Increasing Performance with Formal-based ‘X’ Verification

[Preface: on October 15 at 8am Pacific, Product Engineer Ping Yeung will be delivering a free, detailed technical webinar on…