Who Knew VIP?

Who Knew VIP?

“Who Knew?” about verification IP (VIP), was the theme of a recent DeepChip post by John Cooley on December 18. …

Happy Halloween from ARM  TechCon

Happy Halloween from ARM TechCon

MENTOR GRAPHICS AT ARM TECHCON This week ARM® TechCon® 2013 is being held at the Santa Clara Convention Center from…

Walking in the Desert or Drinking from a Fire Hose?

Walking in the Desert or Drinking from a Fire Hose?

You don’t need a graphic like the one below to know that multi-core SoC designs are here to stay.  This one…

Virtual Emulation for Debugging

Virtual Emulation for Debugging

A system-level verification engineer once told me that his company consumes over 50% of its emulation capacity debugging failures. According…

Intelligent Testbench Automation – Catching on Fast

Intelligent Testbench Automation – Catching on Fast

Graph-Based Intelligent Testbench Automation While intelligent testbench automation is still reasonably new when measured in EDA years, this graph-based verification…

Instant Replay for Debugging SoC Level Simulations

Instant Replay for Debugging SoC Level Simulations

Instant Replay Offers Multiple Views at Any Speed If you’ve watched any professional sporting event on television lately, you’ve seen…

Combining Intelligent Testbench Automation with Constrained Random Testing

Combining Intelligent Testbench Automation with Constrained Random Testing

Who Doesn’t Like Faster? In my last blog post I introduced new technology called Intelligent Testbench Automation (“iTBA”).  It’s generating…

Intelligent Testbench Automation Delivers 10X to 100X Faster Functional Verification

Intelligent Testbench Automation Delivers 10X to 100X Faster Functional Verification

iTBA Introduction If you’ve been to DAC or DVCon during the past couple of years, you’ve probably at least heard…