Verification Horizons | September 2021

The September Verification Horizons is Now Online!

I’m really excited to share with you a very special issue of the Verification Horizons newsletter for September, 2021. The…

Why Is My Coverage The Way It Is?

Coverage is as Coverage does Writing coverage is an art. At least it is a skill which takes imagination, practice…

Performance Profiling How-To (Make My Testbench Faster)

Here’s the situation… You’re DV lead. You and your team are at month 10 of a 12 month development cycle….

Simulation Performance Profiling Like a Pro

New product development is the fun part of working with Siemens. And over the past 9 months I’ve been lucky…

Parking lot with an Automobile and Pickup, plus class variables

Class Variables and $cast

Introduction My previous post showed how SystemVerilog class variables can refer to base and derived objects. This post shows you…

SPICE Turns 50!

50 years ago on 4 August 1971, the IEEE Journal of Solid-State Circuits published the Dr. Nagel and Dr. Rohrer…

Deploying Formal in a DO-254 Program

The primary focus of DO-254, referred to as ED-80 in Europe, is hardware reliability of airborne electronic hardware. DO-254 is…

Base and derived classes and their handles

Class Variables and Assignments in SystemVerilog

Introduction Good OOP style says you should start your project with a common base class (or several). When you want…

Qrun-ing Optimized Build Flows in Questasim

Qrun-ing with Questasim For Questasim users, qrun will be a welcome surprise. Admittedly, I’ve never been a huge fan of…