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More DVCon–More Mentor Tutorials!

More DVCon–More Mentor Tutorials!

As DVCon expands, we at Mentor Graphics have grown our sponsored sessions as well.  Would you expect less? In DVCon’s…

UVM 1.2: Open Public Review

UVM 1.2: Open Public Review

UVM 1.2 Release is Imminent As vice chair of DVCon 2014, I can share with you that the Universal Verification…

DVCon 2014: Standards on Display

DVCon 2014: Standards on Display

One of the nice things about DVCon is the update one can get from the developers of IEEE and Accellera…

Just because FPGAs are programmable doesn’t mean verification is dead

Just because FPGAs are programmable doesn’t mean verification is dead

Marketing teams at FPGA vendors have been busy as the silicon nanometer geometry race escalates. Altera is “delivering the unimaginable”…

Managing Verification Coverage Information

Managing Verification Coverage Information

The UCIS Story There is no secret as design sizes grow it is doubly burdensome for verification.  Two factors that…

Epilogue: The 2012 Wilson Research Group Functional Verification Study

Epilogue: The 2012 Wilson Research Group Functional Verification Study

Wow! I’ve been on the road since August, and finally found a spare moment to get back to this blog….

New Verification Horizons Issue Available

New Verification Horizons Issue Available

Wanted to let you all know that the October, 2013 issue of Verification Horizons is available online. You can view…

Happy Halloween from ARM  TechCon

Happy Halloween from ARM TechCon

MENTOR GRAPHICS AT ARM TECHCON This week ARM® TechCon® 2013 is being held at the Santa Clara Convention Center from…

IEEE Standards Association Symposium on EDA Interoperability

IEEE Standards Association Symposium on EDA Interoperability

Low Power Flow Kicks-off Symposium In the world of electronic design automation, as an idea takes hold and works its…