Part 1: The 2016 Wilson Research Group Functional Verification Study

Part 1: The 2016 Wilson Research Group Functional Verification Study

FPGA Design Trends In my previous blog, I introduced the 2016 Wilson Research Group Functional Verification Study (click here). The objective…

Understanding and Minimizing Study Bias (2016 Study)

Understanding and Minimizing Study Bias (2016 Study)

This blog is a continuation of a series of blogs that present the highlights from the 2016 Wilson Research Group…

Prologue: The 2016 Wilson Research Group Functional Verification Study

Prologue: The 2016 Wilson Research Group Functional Verification Study

This is the first in a series of blogs that presents the findings from our new 2016 Wilson Research Group…

2016 Bangalore edition of Mentor’s Forum for Verification is round the corner

2016 Bangalore edition of Mentor’s Forum for Verification is round the corner

Just over a decade ago, Mentor Graphics had initiated a technology forum in India called the ‘EDA Tech Forum’, this…

UVM: The Value of Flexibility

UVM: The Value of Flexibility

Having been deeply involved with Universal Verification Methodology (UVM) from its inception, and before that, with OVM from its secret-meetings-in-a-hidden-hotel-room…

No to Know VIP – Validated!

No to Know VIP – Validated!

We have talked about how one can go from ‘No to Know VIP’ in my 3 part series and how…

Introducing the Verification Academy Patterns Library!

Introducing the Verification Academy Patterns Library!

If you have been involved in either software or advanced verification for any length of time, then you probably have…

No to Know VIP – Part 3

No to Know VIP – Part 3

Thus far we have talked about the importance of having a VIP which is easy to connect to the DUT…

Conclusion: The 2014 Wilson Research Group Functional Verification Study

Conclusion: The 2014 Wilson Research Group Functional Verification Study

Impact of Design Size on First Silicon Success This blog is a continuation of a series of blogs related to…