When it comes to formal methods, many engineers are skeptics. Perhaps this is due to value propositions that have been…
A system-level verification engineer once told me that his company consumes over 50% of its emulation capacity debugging failures. According…
Graph-Based Intelligent Testbench Automation While intelligent testbench automation is still reasonably new when measured in EDA years, this graph-based verification…
In his recent post on UVM: Some Thoughts Before DVCon, Dennis outlined some great ideas about what we think should…
Instant Replay Offers Multiple Views at Any Speed If you’ve watched any professional sporting event on television lately, you’ve seen…
Who Doesn’t Like Faster? In my last blog post I introduced new technology called Intelligent Testbench Automation (“iTBA”). It’s generating…
iTBA Introduction If you’ve been to DAC or DVCon during the past couple of years, you’ve probably at least heard…
Verification Techniques & Technologies Adoption Trends This blog is a continuation of a series of blogs, which present the highlights…
Well, another DAC is behind us, and you know what that means. That’s right, the super-sized DAC issue of Verification…
