osmosis 2022 - December 8, 2022 in Munich

Osmosis – our annual event for formal verification users – is back F2F this December 8, 2022!

Attention anyone interested in Formal Verification: after a hiatus due to you-know-what, osmosis is back in-person this coming December 8…

Part 1: The 2022 Wilson Research Group Functional Verification Study

In my previous blog, I introduced the 2022 Wilson Research Group Functional Verification Study (click here). The objective of my previous…

Prologue: The 2022 Wilson Research Group Functional Verification Study

This is the first in a sequence of blogs that presents the findings from our new 2022 Wilson Research Group…

Implicit handle: this

SystemVerilog: Implicit handles

Introduction In the last blog post [SC(SECL1] Farmer Ted asked you to keep track of his animals and you wrote some…

SystemVerilog: Class Member Visibility

SystemVerilog: Class Member Visibility

Introduction Farmer Ted wants to keep track of the animals on his property and asks you to write the code….

Siemens EDA VIP at Flash Memory Summit

Come and see what Siemens EDA’s Verification IP experts are talking about at the Flash Memory Summit event. This annual…

How to Mitigate the Impact of Security and Safety Flaws on Automotive ICs

Nearly 7 years ago security researchers uncovered how to remotely access and control the steering, cruise control, and braking system…

DAC 2022: The Digital Twin Reimagined – One Model To Rule Them All?

To many of us in the EDA world, using the term “digital twin” to describe how customers’ electronically model their…

Learn How to Verify PCIe Integrity and Data Encryption (IDE) Security Logic at the 2022 PCI SIG Developer Conference

Making sure that digital logic enables secure data to safely flow through a system is a critical task for RTL…