Watch Accellera’s DAC 2020 Functional Safety Panel

Accellera’s 57th Design Automation Conference luncheon (virtual of course!) focused attention on its Functional Safety Working Group activities.  The group…

Accellera at Virtual DAC 2020

Functional Safety: Accellera’s Virtual Lunch Event Focus With DAC 2020 going virtual, the opportunities for social interactions have had to…

DVCon U.S. 2020

DVCon U.S. 2020

If you have not yet registered for DVCon U.S. 2020, you can do so here. If you have the time,…

Join us at DVClub Boston

As a longstanding sponsor of DVClub events around the world, we are pleased to share the news that we now…

Mitigating Security Risks When Designing with 3rd-Party Silicon IP

Mitigating Security Risks When Designing with 3rd-Party Silicon IP

Accellera DAC Panel to Discuss There is probably not one embedded system that is not built without open source software,…

Part 11: The 2018 Wilson Research Group Functional Verification Study

Part 11: The 2018 Wilson Research Group Functional Verification Study

ASIC/IC Low Power Trends This blog is a continuation of a series of blogs related to the 2018 Wilson Research…

Tom Fitzpatrick Honored with Accellera Technical Excellence Award

Tom Fitzpatrick Honored with Accellera Technical Excellence Award

Recognized for contributions to Verilog, SystemVerilog, UVM and Portable Stimulus Accellera has selected our own Tom Fitzpatrick as its 2019…

Portable Stimulus Standard – In Use Now

Portable Stimulus Standard – In Use Now

Explore it with Tom Fitzpatrick For those who struggle with the daunting challenges to verify next generation SoC’s and are…

Part 6: The 2018 Wilson Research Group Functional Verification Study

Part 6: The 2018 Wilson Research Group Functional Verification Study

FPGA Language and Library Trends This blog is a continuation of a series of blogs related to the 2018 Wilson…