Visit Booth 1350 – The hub of OVM/UVM Activity at DAC The OVM World booth at the Design Automation Conference…
I’d like to encourage you to attend the technical panel titled Bridging Pre-Silicon Verification and Post-Silicon Validation at this year’s …
Companion UVM-EA OVM Compatibility Overlay Kit Available for Download Mentor Graphics has made available its UVM-EA starter kit to promote…
Requirements set for Accellera UVM-EA (Early Adopter) Release This was a productive week for Accellera. After months of discussions, the…
After months of field testing and several beta releases the past few years, Mentor Graphics has released the OVM 1.0…
Just in time for the holidays! 🙂 IEEE Std. 1800™-2009, aka SystemVerilog 2009, is ready for purchase and download from…
Hi Gang, As you may know, in addition to my duties here at Mentor, I’m also the General Chair of…
I have lots of blog entries about 95% ready to publish. This entry is from an e-mail I wrote a…
I’ve been around simulation and synthesis languages for a while; back when you needed an NDA to see the Verilog…
