Accellera Proposes a New Working Group

Accellera Proposes a New Working Group

Accellera to explore the need for an IP Security Assurance Standard In the era of SoC design where major design…

Design & Verification IP Forum 2017

Design & Verification IP Forum 2017

VIP: Accelerating SoC Design Verification Your SoC designs have grown more complex, not just by the sheer number of transistors…

No to Know VIP – Part 3

No to Know VIP – Part 3

Thus far we have talked about the importance of having a VIP which is easy to connect to the DUT…

UVM Forum 2015 LIVE!

UVM Forum 2015 LIVE!

Verification Academy Brings “UVM Live” to the Santa Clara Convention Center For everyone involved in the functional verification of electronic…

Verification Horizons: The DAC 2015 Issue

Verification Horizons: The DAC 2015 Issue

If you were not one of the 100’s of visitors to the Verification Academy booth at DAC 2015 and missed…

No to Know VIP – Part 2

No to Know VIP – Part 2

Continuing on our journey on what is needed to get to productive verification with VIP, the first step is to…

No to Know VIP

No to Know VIP

In a recent post on deepchip.com John Cooley wrote about “Who Knew VIP?”. In addition, Mark Olen wrote about this…

Who Knew VIP?

Who Knew VIP?

“Who Knew?” about verification IP (VIP), was the theme of a recent DeepChip post by John Cooley on December 18. …

User-2-User’s Functional Verification Track

User-2-User’s Functional Verification Track

User Adoption of OVM Featured; Views on UVM Discussed The Mentor Graphics user group meeting, User-2-User, in Santa Clara is…