Functional Verification: What is a SystemVerilog Virtual Interface?

When I learned the SystemVerilog verification features, one concept had me baffled – virtual interfaces. What are these and why…

Design for Test: What Is a Streaming Scan Network (SSN)?

Finding manufacturing defects in integrated circuit (IC) chips is hard to do.  Automatic test pattern generation (ATPG) and on-chip compression…

Honoring International Women’s Day

Providing Education & Certification to support tomorrow’s female leaders! When walking along one of my engineering school’s hallway, one poster…

Journey From Unemployment to Being a Recognized Certified Technical Contributor

“Education is the movement from darkness to light”, wrote 20th century scholar Allan Bloom. The past couple of years have…

Coming soon – Siemens Xcelerator Academy: the next generation of learning services

Siemens Xcelerator Academy:  the next generation of learning offerings from Siemens. Siemens Digital Industries Software will soon launch Siemens Xcelerator…

Questa Verification IP (QVIP) Course

Do you want to learn how to verify your SoC (System on a Chip) design with Siemens Questa Verification IP…

PCB Creepage

As I was teaching a class, I was asked a question about how to do notches for creepage.  Well, that…

The “Why” and “Where” of Serial Channel Design

Author: Mark Brown, Senior Instructional Designer and Technical Trainer, Siemens EDA Learning Services Have you ever wondered why you are…

Featured Team: Tessent Training Team

Bruce Swanson, Senior Instructional Designer and Trainer As a Senior Instructional Designer and Trainer, Bruce develops training materials and teaches…